
PIC18F2450/4450
2006 Microchip Technology Inc.
Advance Information
DS39760A-page 129
14.0
UNIVERSAL SERIAL BUS
(USB)
This section describes the details of the USB peripheral.
Because of the very specific nature of the module,
knowledge of USB is expected. Some high-level USB
USB” only for application design reference. Designers
are encouraged to refer to the official specification
published by the USB Implementers Forum (USB-IF) for
the latest information. USB Specification Revision 2.0 is
the most current specification at the time of publication
of this document.
14.1
Overview of the USB Peripheral
The PIC18F2450/4450 device family contains a full-
speed and low-speed compatible USB Serial Interface
Engine (SIE) that allows fast communication between
any USB host and the PIC microcontroller. The SIE can
be interfaced directly to the USB, utilizing the internal
transceiver, or it can be connected through an external
transceiver. An internal 3.3V regulator is also available
to power the internal transceiver in 5V applications.
Some special hardware features have been included to
improve performance. Dual port memory in the
device’s data memory space (USB RAM) has been
supplied to share direct memory access between the
microcontroller core and the SIE. Buffer descriptors are
also provided, allowing users to freely program
endpoint memory usage within the USB RAM space.
peripheral and its features.
FIGURE 14-1:
USB PERIPHERAL AND OPTIONS
UOE(1)
256-Byte
USB RAM
USB
SIE
USB Control and
VM(1)
VP(1)
RCV(1)
VMO(1)
VPO(1)
Transceiver
External
Transceiver
EN
3.3V Regulator
D+
D-
OE
VUSB
External 3.3V
Supply(3)
FSEN
UTRDIS
USB Clock from the
Oscillator Module
Configuration
VREGEN
External
Pull-ups(2)
(Low
(Full
PIC18F2450/4450 Family
USB Bus
FS
Speed)
Note 1:
This signal is only available if the internal transceiver is disabled (UTRDIS = 1).
2:
The pull-ups can be supplied either from the VUSB pin or from an external 3.3V supply.
3:
Do not enable the internal regulator when using an external 3.3V supply.